The present invention relates to an exposure mask and a manufacturing method of a semiconductor device using the same, and particularly, to a method for preventing formation of a scum during a micro lithography process using asymmetric illumination.
As semiconductor devices and integrated circuit devices become more highly integrated, research has been conducted on resolution enhancement technology which can improve device properties and secure a process margin of the devices.
For instance, in a memory semiconductor device, the capacity of memory has been greatly increased and the critical dimension (CD) of a pattern for forming the device has been decreased.
As a result, an exposure process for generating the circuit diagram, which forms a pattern on a wafer, is considered to be more important than a lithography process.
To improve resolution, asymmetric illumination has been introduced in the exposure process. Particularly, when dipole illumination is performed, line and space of the circuit diagram can be provided in more detail.
A dipole aperture used during dipole illumination is equipped with a light-transmitting part in the Y-axis direction.
FIG. 1 shows a conventional semiconductor device formed with the lithographic process using a dipole aperture. A scum “a” is generated (e.g., due to acetone residue) in the X-axis direction.
FIG. 2 is a plane view of a conventional semiconductor device formed by the lithographic process using an exposure mask that includes a scattering space portion to prevent formation of the scum shown in FIG. 1.
When the exposure mask is applied to a semiconductor device having a design rule of more than 50 nm, the scum is not generated.
FIG. 3 (left side) shows a plane view of an exposure mask 100 which includes the scattering space portion of FIG. 2. As shown on the right side of FIG. 3, a simulation result shows a semiconductor device formed with the lithographic process using the exposure mask 100. The exposure mask 100 is applied to a semiconductor device having a design rule of less than 50 nm.
A scum 200 is generated but is smaller than the scum of FIG. 1.
FIG. 4 is a graph illustrating the relationship between a distance of the simulation result of FIG. 3 (indicated by the arrow in FIG. 3) and luminous intensity. The X-axis shows the distance values and the Y-axis shows the luminous intensity values. As seen in the center portion of the graph, the luminous intensity values are at a maximum at the distance values that correspond to the space and the scattering space portions of the exposure mask 100.
The likelihood of generating a scum is increased because the minimum values of the central portion of the graph are lower than the threshold energy level. For example, a scum may be generated at distances corresponding to luminous intensity values less than 2.3.
As described above, in the manufacturing method of a semiconductor device using the conventional exposure mask, when performing the lithographic process using asymmetric illumination to form a semiconductor device having a design rule of less than 50 nm, a scum is generated. In addition, when using the scattering space portion, the size of the scum is slightly reduced but the scum is still generated. Accordingly, it is difficult to implement the high integration of semiconductor devices.